The present invention relates to design technology of integrated circuits, and more specifically, to a method and apparatus for diagnosing a scan chain.
With advances of semiconductor technology, the design and manufacture of semiconductors become more and more complex. Such complexity improves the performance of semiconductor integrated circuits and also increases the possibility of generating defects. Therefore, testing technology becomes increasingly important. For example, after the front-end design of a semiconductor integrated circuit is completed, usually it is subjected to a logical test, so as to ensure that the logical design itself is correct. Typically the logical test is also called verification. After the completion of the logical test, a netlist is generated through synthesis steps, so as to be used in physical manufacture. In this regard, scanning technology is needed for a physical test of manufactured integrated circuits. This is because it is impossible to completely learn internal state information by observing signals on pins of integrated circuits, while the scanning technology can transfer the internal state information of integrated circuits off-chip using dedicated pins.
In order to use scanning technology in a physical test, it is necessary to add scan chains to the netlist as generated from a logic synthesis process. As will be appreciated by one skilled in the art, for the purpose of signal stability, the output of each function module inside an integrated circuit is not directly connected to the input of the next level but first connected to the input of a register whose output is then connected to the input of the next level. The function modules mentioned here are modules needed for fulfilling the function of the integrated circuit itself, such as respective logic gates and various operators, etc. A scan chain is formed by part or all of these registers, and a register used for forming a scan chain may be termed a scan register. Adding a scan chain to a netlist is to add a direct connection between scan registers so as to serially connect the scan registers, and to add a corresponding scan chain management module.
Under the control of a scan chain management module, a scan register may be in a scan mode or a function mode. In the scan mode, one scan chain may be regarded as one shift register, that is, the input of a downstream scan register is connected to the output of an upstream scan register. A group of logic values may be written into each scan register via shift-in, and also logic values may be read from each scan register via shift-out. Here, the upstream refers to a starting point closer to the scan chain, i.e., an integrated circuit pin that inputs a shift-in logic value to the scan chain and the downstream refers to an ending point closer to the scan chain, i.e., an integrated circuit pin that reads a shift-out logic value from the scan chain. In the function mode, the input of a scan register is connected to the output of a function module. The switch between the scan mode and the function mode may be implemented by a multiplexer (MUX) connected at the input end of the scan register.
The physical test of an integrated circuit by using the scanning technology comprises three basic steps. The first one is a shift-in step. In the scan mode, a shift-in operation is performed in which each scan register is set to a desired logic value. Since the output of each scan register is further connected to the input of a function module, the input of each scan register is also set to a desired logic value. The second one is a processing step. In the function mode, one or more clock cycles are provided to each function module so that each function module processes an inputted logic value according to a clock signal. Since the scan register is in the function mode, its input is connected to the output of each function module so that a processing result of each function module is saved in the scan register. The third one is a shift-out step. In the scan mode, a shift-out operation is performed so that the output of each function module which is saved in each scan register is read at the outside of the integrated circuit. With the knowledge of the input and output of each function module in the integrated circuit, it is possible to judge whether each function module operates normally or not.
Whether the above steps of the physical test are accurate or not, it depends on whether the scan chain operates normally or not. Therefore, there is a need for a series of methods for diagnosing scan chains.